The company Micron Technology announced the successful completion of the process of developing a 128GB flash memory chip with the highest density of transistors. Surface area it is 146 square meters. mm, and the chips are manufactured on 20 nm process technology-based three-level cells. According to a statement of its creators, the chip in 12×12 mm in size by about a quarter less than similar 20 nm solutions based on MLC (multi-level cell)-technology.
What is the difference between a three-tier structure (TLC) of the single-level (SLC) and multi-level counterparts? They are all made of the same transistors, but a different number of bits stored in a single cell: SLC – one, MLC – two, and TLC – three. As a result of increasing the strength of storage, however, and there are cons. These include reducing the length of the life cycle of the memory and increase the delay in reading, writing, and erasing data.
Developers are positioning their new chips as the best options for use in the devices such as flash cards and USB-drives, while not encroaching on the market of solid drives . The market share of portable portable storage devices is forecast this year will have 35% of the supply of memory chips NAND, so it is expected to fight for serious. Micron now delivers new chips to its main partners, and the beginning of industrial production is scheduled for the second quarter of the year.
Meanwhile, other manufacturers do not lose time in vain, and use the chips on TLC technology in their products. Samsung, for example, last year introduced theSSD Samsung Series 840, a high speed read and write data.